1. Field of the Invention
The present invention concerns a continuous-time delta-sigma analog-digital converter for the conversion of an analog input signal into a digital output signal, comprising:                an analog filter, which filters the analog input signal and has at least one externally circuited operational amplifier for the formation of an integrator stage,        a clock-driven quantiser, which quantises the filtered analog signal outputted by the analog filter for the generation of the digital output signal, and        a feedback arrangement with at least one digital-analog converter, which supplies to the analog filter at least one analog feedback signal on the basis of the digital output signal.        
2. Description of the Prior Art
From DE 10 2004 009 611 A1, for example, a converter of this kind is of known art. In this prior art an analog filter for the filtering of the input signal has an integrator that is implemented in terms of an operational amplifier, whose output is fed back via a capacitance to the inverting signal input of the operational amplifier. The design of the operational amplifier is not described in this publication.
A fundamental problem with conventional continuous-time delta-sigma analog-digital converters is that of guaranteeing a sufficiently high transit frequency of the one or more operational amplifiers that are used for the formation of one or a plurality of integrator stages. It is of known art that the amplification (open loop gain) of an operational amplifier decreases at high frequencies with increasing frequency. The frequency at which the amplification of an operational amplifier falls to the value 1 is designated as its “transit frequency”. An integrator stage that is implemented in terms of an externally circuited operational amplifier therefore functions reliably only for signal frequencies that are significantly lower than the transit frequency of the operational amplifier used. Expressed in another way, for a prescribed transit frequency, or bandwidth, of an integrator stage, an operational amplifier with a transit frequency that is in comparison significantly higher must be used. Operational amplifiers with a high transit frequency consume however a comparatively large amount of electrical power.
It is an object of the present invention to make available a delta-sigma analog-digital converter of the kind cited in the introduction, which for a prescribed power requirement is suitable for comparatively high signal frequencies, or for a prescribed signal bandwidth possesses a comparatively low power requirement.
In the converter according to the invention it is stipulated that the operational amplifier has a first amplifier path and, in parallel to this, a second amplifier path, wherein the transit frequency of the second amplifier path is lower than the transit frequency of the first amplifier path.
The transit frequency of the second amplifier path is preferably lower by at least a factor 2 than the transit frequency of the first amplifier path.
In a preferred form of embodiment the transit frequency of the first amplifier path is higher than the transit frequency of the integrator stage formed by means of the operational amplifier. These transit frequencies preferably differ by at least a factor 2.
A so-called Bode diagram is particularly well-suited for the graphical representation of the amplification of an operational amplifier, or the amplifications of the amplifier paths, stipulated according to the invention, of an operational amplifier, as a function of the frequency. This takes the form of a log-log plot in which the logarithm of the amplification (e.g. measured in dB) is plotted against the logarithm of the frequency. In such a diagram an essentially linear characteristic typically ensues for the frequency-dependent amplification, which decreases with higher frequencies and at the transit frequency assumes the value 1 (for the amplification) or 0 (for the logarithm of the amplification). When in the following paragraphs mention is made of the “gradient” in a Bode diagram, then what is strictly being referred to is the negative gradient. Correspondingly a “greater gradient” denotes a characteristic for the frequency-dependent amplification that falls off more strongly at higher frequencies.
In a preferred form of embodiment it is stipulated that for frequencies that are lower than the transit frequency of the second amplifier path the gradient of the amplification of the second amplifier path plotted in a Bode diagram is greater by at least a factor 2 than the corresponding gradient for the first amplifier path.
In a particularly simple form of embodiment in terms of circuitry it is stipulated that the second amplifier path is formed from a connection in series of a plurality of amplifier stages.
In a further development of the invention it is stipulated that the operational amplifier has a third amplifier path whose transit frequency is lower than the transit frequency of the second amplifier path. Here too it is particularly favourable if these transit frequencies differ from each other by at least a factor 2. Furthermore for frequencies that are lower than the transit frequency of the third amplifier path, the gradient of the amplification of the third amplifier path plotted in a Bode diagram can be chosen to be greater by at least a factor 2 than the corresponding gradient for the second amplifier path.
In a corresponding manner further amplifier paths with, in each case, a reduced transit frequency can be introduced into the design of the circuitry structure of the operational amplifier. Here too the dimensioning rules formulated above for the first two, or the first three, amplifier paths concerning the transit frequency and/or the gradient of the amplification can once again be stipulated.
If the above noted third amplifier path is stipulated, then this is preferably formed from a connection in series of a number of amplifier stages, this number being greater than the number of amplifier stages of the second amplifier path. If even more amplifier paths are stipulated, then correspondingly further successive increases in the number of amplifier stages for the further amplifying paths can be stipulated.
The particular amplifier path structure stipulated according to the invention enables the implementation of a delta-sigma analog-digital converter with outstanding performance characteristics, e.g. with a signal band ranging up to very high frequencies with, at the same time, a low power requirement and high quality (e.g. linearity) for the output signal. In particular in this connection a form of embodiment is of advantage in which the quantiser has a plurality of quantising stages and/or the digital output signal of the quantiser possesses a thermometer code. In one form of embodiment, for example, the quantiser has 16 quantising stages (corresponding to 4 bits). For both rapid quantisation and also rapid digital-analog conversion in the feedback arrangement it is of advantage if the digital output signal of the quantiser possesses a thermometer code.
In one form of embodiment it is stipulated that the delta-sigma analog-digital converter is of full-differential design.
A preferred manufacturing technology for the delta-sigma analog-digital converter is CMOS technology. The converter can in particular represent a function block of an integrated circuit arrangement.
In a manner known per se the quantiser can be located downstream of a digital processor (DSP) for the further processing of the digital output signal. In this case the digital output signal can be branched off from a circuit node arranged between the quantiser and the digital signal processor and can be supplied to the feedback arrangement.
The features of the above-described forms of embodiment and/or further developments of the invention can of course also advantageously be combined with one another.